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  www.irf.com 1 5/4/11 fig 1. typical on-resistance vs. gate voltage fig 2. typical total gate charge vs gate-to-source voltage  click on this section to link to the appropriate technical paper.  click on this section to link to the directfet website.   surface mounted on 1 in. square cu board, steady state.  t c measured with thermocouple mounted to top (drain) of part.   repetitive rating; pulse width limited by max. junction temperature.  starting t j = 25c, l = 0.051mh, r g = 25 , i as = 21a.  IRF8308MPBF irf8308mtrpbf directfet   power mosfet  applicable directfet outline and substrate outline (see p.7,8 for details)  
          rohs compliant containing no lead and bromide   low profile (<0.7 mm)  dual sided cooling compatible   ultra low package inductance  optimized for high frequency switching   ideal for cpu core dc-dc converters  optimized for sync. fet socket of sync. buck converter   low conduction and switching losses  compatible with existing surface mount techniques   100% rg tested sq sx st mq mx mt mp directfet  isometric  description the IRF8308MPBF combines the latest hexfet? power mosfet silicon technology with the advanced directfet tm packaging to achieve the lowest on-state resistance in a package that has the footprint of a so-8 and only 0.7 mm profile. the directfet package is compatible with existing layout geometries used in power applications, pcb assembly equipment and vapor phase, infra-red or convection sol dering techniques, when application note an-1035 is followed regarding the manufacturing methods and processes. the directfet package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%. the IRF8308MPBF balances both low resistance and low charge along with ultra low package inductance to reduce both conduction a nd switching losses. the reduced total losses make this product ideal for high efficiency dc-dc converters that power the latest g eneration of processors operating at higher frequencies. the IRF8308MPBF has been optimized for parameters that are critical in synchronous buck including rds(on), gate charge and cdv/dt-induced turn on immunity. the IRF8308MPBF offers particularly low rds(on) and high cd v/dt immunity for synchronous fet applications . v dss v gs r ds(on) r ds(on) 30v max 20v max 1.9m @ 10v 2.7m @ 4.5v absolute maximum ratin g s parameter units v ds drain-to-source voltage v v gs gate-to-source voltage i d @ t a = 25c continuous drain current, v gs @ 10v i d @ t a = 70c continuous drain current, v gs @ 10v a i d @ t c = 25c continuous drain current, v gs @ 10v  i dm pulsed drain current  e as single pulse avalanche energy  mj i ar avalanche current  a 21 12 max. 21 150 212 20 30 27 2.0 4.0 6.0 8.0 10.0 v gs , gate-to-source voltage (v) 0 2 4 6 8 t y p i c a l r d s ( o n ) ( m ) t j = 25c t j = 125c i d = 27a 0 20406080 q g total gate charge (nc) 0 2 4 6 8 10 12 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 24v vds= 15v i d = 21a q g tot q gd q gs2 q rr q oss v gs(th) 28nc 8.2nc 3.5nc 34nc 20nc 1.8v

 2 www.irf.com   repetitive rating; pulse width limited by max. junction temperature.  pulse width 400 s; duty cycle 2%.  static @ t j = 25c (unless otherwise specified) parameter min. typ. max. units bv dss drain-to-source breakdown voltage 30 ??? ??? v ? v dss / t j breakdown voltage temp. coefficient ??? 22 ??? mv/c r ds(on) static drain-to-source on-resistance ??? 1.90 2.50 m ??? 2.70 3.50 v gs(th) gate threshold voltage 1.35 1.8 2.35 v v gs(th) / t j gate threshold voltage coefficient ??? -6.1 ??? mv/c i dss drain-to-source leakage current ??? ??? 1.0 a ??? ??? 150 i gss gate-to-source forward leakage ??? ??? 100 na gate-to-source reverse leakage ??? ??? -100 gfs forward transconductance 130 ??? ??? s q g total gate charge ??? 28 42 q gs1 pre-vth gate-to-source charge ??? 8.4 ??? q gs2 post-vth gate-to-source charge ??? 3.5 ??? nc q gd gate-to-drain charge ??? 8.2 ??? q godr gate charge overdrive ??? 7.9 ??? see fig. 15 q sw switch charge (q gs2 + q gd ) ??? 12 ??? q oss output charge ??? 20 ??? nc r g gate resistance ??? 1.2 2.2 t d(on) turn-on delay time ??? 11 ??? t r rise time ??? 19 ??? t d(off) turn-off delay time ??? 23 ??? ns t f fall time ??? 16 ??? c iss input capacitance ??? 4404 ??? c oss output capacitance ??? 885 ??? pf c rss reverse transfer capacitance ??? 424 ??? diode characteristics parameter min. typ. max. units i s continuous source current ??? ??? 150 (body diode) a i sm pulsed source current ??? ??? 212 (body diode)  v sd diode forward voltage ??? ??? 1.0 v t rr reverse recovery time ??? 20 30 ns q rr reverse recovery charge ??? 34 51 nc di/dt = 300a/ s  t j = 25c, i s = 21a, v gs = 0v  showing the integral reverse p-n junction diode. v gs = 4.5v, i d = 21a  v ds = v gs , i d = 100 a t j = 25c, i f =21a v gs = 4.5v i d = 21a v gs = 0v v ds = 15v i d = 21a v dd = 15v, v gs = 4.5v  conditions v gs = 0v, i d = 250 a reference to 25c, i d = 1ma v gs = 10v, i d = 27a  v gs = 20v v gs = -20v v ds = 24v, v gs = 0v v ds = 15v v ds = 24v, v gs = 0v, t j = 125c mosfet symbol r g = 1.8 v ds = 15v, i d =21a conditions ? = 1.0mhz v ds = 16v, v gs = 0v

 www.irf.com 3 fig 3. maximum effective transient thermal impedance, junction-to-ambient  used double sided cooling, mounting pad with large heatsink.
mounted on minimum footprint full size board with metalized back and with small clip heatsink.  r is measured at   
    surface mounted on 1 in. square cu (still air).  
  with small clip heatsink (still air)   mounted on minimum footprint full size board with metalized back and with small clip heatsink (still air) 1e-006 1e-005 0.0001 0.001 0.01 0.1 1 10 100 t 1 , rectangular pulse duration (sec) 0.01 0.1 1 10 100 t h e r m a l r e s p o n s e ( z t h j a ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthja + tc ri (c/w) ? ( sec ) 0.99292 0.000074 2.171681 0.007859 24.14602 0.959 17.69469 32.6 j j 1 1 2 2 3 3 r 1 r 1 r 2 r 2 r 3 r 3 ci i / i / ri a 4 4 r 4 r 4 absolute maximum ratin g s parameter units p d @t a = 25c power dissipation w p d @t a = 70c power dissipation p d @t c = 25c power dissipation  t p peak soldering temperature c t j operating junction and t stg storage temperature range thermal resistance parameter typ. max. units r ja junction-to-ambient  ??? 45 r ja junction-to-ambient  12.5 ??? r ja junction-to-ambient  20 ??? c/w r jc junction-to-case  ??? 1.4 r j-pcb junction-to-pcb mounted 1.0 ??? linear derating factor  w/c 0.022 270 -40 to + 150 max. 89 2.8 1.8

 4 www.irf.com fig 5. typical output characteristics fig 4. typical output characteristics fig 6. typical transfer characteristics fig 7. normalized on-resistance vs. temperature fig 8. typical capacitance vs.drain-to-source voltage fig 9. typical on-resistance vs. drain current and gate voltage 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) vgs top 10v 5.0v 4.5v 4.0v 3.5v 3.0v 2.8v bottom 2.5v 60 s pulse width tj = 25c 2.5v 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) vgs top 10v 5.0v 4.5v 4.0v 3.5v 3.0v 2.8v bottom 2.5v 60 s pulse width tj = 150c 2.5v 1.5 2.0 2.5 3.0 3.5 4.0 v gs , gate-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( ) t j = 150c t j = 25c t j = -40c v ds = 10v 60 s pulse width -60 -40 -20 0 20 40 60 80 100 120 140 160 t j , junction temperature (c) 0.5 1.0 1.5 2.0 t y p i c a l r d s ( o n ) ( n o r m a l i z e d ) i d = 27a v gs = 10v vgs = 4.5v 1 10 100 v ds , drain-to-source voltage (v) 100 1000 10000 100000 c , c a p a c i t a n c e ( p f ) v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd c oss c rss c iss 0 20 40 60 80 100 i d , drain current (a) 1 2 3 4 5 6 t y p i c a l r d s ( o n ) ( m ) t j = 25c vgs = 3.5v vgs = 4.0v vgs = 4.5v vgs = 5.0v vgs = 10v

 www.irf.com 5 fig 13. typical threshold voltage vs. junction temperature fig 12. maximum drain current vs. case temperature fig 10. typical source-drain diode forward voltage fig11. maximum safe operating area fig 14. maximum avalanche energy vs. drain current 0.2 0.4 0.6 0.8 1.0 1.2 v sd , source-to-drain voltage (v) 0.1 1.0 10.0 100.0 1000.0 i sd , reverse drain current (a) v gs = 0v t j = 150c t j = 25c t j = -40c 25 50 75 100 125 150 t c , case temperature (c) 0 50 100 150 i d , d r a i n c u r r e n t ( a ) -75 -50 -25 0 25 50 75 100 125 150 t j , junction temperature ( c ) 0.5 1.0 1.5 2.0 2.5 t y p i c a l v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 100 a 25 50 75 100 125 150 starting t j , junction temperature (c) 0 10 20 30 40 50 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 7.2a 8.4a bottom 21a 0.1 1.0 10.0 100.0 v ds , drain-tosource voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) t a = 25c tj = 150c single pulse 1msec 10msec operation in this area limited by r ds (on) 100 sec

 6 www.irf.com fig 15a. gate charge test circuit fig 15b. gate charge waveform vds vgs id vgs(th) qgs1 qgs2 qgd qgodr fig 16b. unclamped inductive waveforms t p v (br)dss i as fig 16a. unclamped inductive test circuit fig 17b. switching time waveforms v gs v ds 90% 10% t d(on) t d(off) t r t f fig 17a. switching time test circuit r g i as 0.01 t p d.u.t l v ds + - v dd driver a 15v 20v   1k vcc dut 0 l  

1  

0.1 %
 
   + -  

 www.irf.com 7 directfet  substrate and pcb layout, mx outline (medium size can, x-designation). please see an-1035 for directfet assembly details and stencil and substrate design recommendations fig 18.     for n-channel hexfet   power mosfets p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period         
    

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 note: for the most current drawing please refer to ir website at http://www .irf.com/package g = gate d = drain s = source d d d d g s s

 8 www.irf.com 
     gate marking part number logo batch number date code line above the last character of the date code indicates "lead-free" code a b c d e f g h j k l m p 0.017 0.028 0.007 0.040 0.095 0.156 0.028 0.018 0.028 max 0.250 0.38 0.59 0.08 0.88 2.28 3.85 0.68 0.35 0.68 min 6.25 4.80 0.42 0.70 0.17 1.02 2.42 3.95 0.72 0.45 0.72 max 6.35 5.05 0.015 0.023 0.003 0.090 0.035 0.152 0.027 0.027 0.014 min 0.189 0.246 metric imperial dimensions 1.38 1.42 0.80 0.84 0.056 0.054 0.033 0.031 r 0.03 0.08 0.001 0.003 please see an-1035 for directfet assembly det ails, stencil and substrate design recommendations directfet? outline dimension, mx outline (medium size can, x-designation) dimensions are shown in millimeters (inches) 0.199

 www.irf.com 9 data and specifications subject to change without notice. this product has been designed and qualified for the consumer market. qualification standards can be found on ir?s web site. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 05/11 
 
        note: controlling dimensions in mm std reel quantity is 4800 parts. (ordered as irf8308mtrpbf). for 1000 parts on 7" reel, order irf8308mtr1pbf reel dimensions max n.c n.c 0.520 n.c n.c 0.724 0.567 0.606 imperial min 330.0 20.2 12.8 1.5 100.0 n.c 12.4 11.9 standard option (qty 4800) code a b c d e f g h max n.c n.c 13.2 n.c n.c 18.4 14.4 15.4 min 12.992 0.795 0.504 0.059 3.937 n.c 0.488 0.469 metric min 6.9 0.75 0.53 0.059 2.31 n.c 0.47 0.47 tr1 option (qty 1000) max n.c n.c 12.8 n.c n.c 13.50 12.01 12.01 min 177.77 19.06 13.5 1.5 58.72 n.c 11.9 11.9 metric max n.c n.c 0.50 n.c n.c 0.53 n.c n.c imperial loaded tape feed direction note: controlling dimensions in mm code a b c d e f g h imperial min 0.311 0.154 0.469 0.215 0.201 0.256 0.059 0.059 max 8.10 4.10 12.30 5.55 5.30 6.70 n.c 1.60 min 7.90 3.90 11.90 5.45 5.10 6.50 1.50 1.50 metric dimensions max 0.319 0.161 0.484 0.219 0.209 0.264 n.c 0.063


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